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 USB1T11A -- Universal Serial Bus Transceiver
March 2008
USB1T11A -- Universal Serial Bus Transceiver
Features
Complies with Universal Serial Bus Specification 1.1 Utilizes Digital Inputs and Outputs to Transmit and Receive USB Cable Data Supports 12Mbit/s "Full Speed" and 1.5Mbit/s "Low Speed" Serial Data Transmission Compatible with the VHDL "Serial Interface Engine" from USB Implementers' Forum Supports Single-ended Data Interface Single 3.3V Supply ESD Performance: Human Body Model >9.5kV on D-, D+ pins only >4kV on all other pins 16-lead, Space-Saving, MLP Package
Description
The USB1T11A is a one-chip, generic USB transceiver. It is designed to allow 5.0V or 3.3V programmable and standard logic to interface with the physical layer of the Universal Serial Bus. It is capable of transmitting and receiving serial data at both full-speed (12Mbit/s) and low-speed (1.5Mbit/s) data rates. The input and output signals of the USB1T11A conform with the "Serial Interface Engine." Implementation of the serial interface engine allows designers to make USBcompatible devices with off-the-shelf logic to modify and update the application.
Ordering Information
Part Number
USB1T11AM USB1T11AMX USB1T11ABQX USB1T11AMTC USB1T11AMTCX
Operating Temperature Range
-40 to +85C -40 to +85C -40 to +85C -40 to +85C -40 to +85C
Package
14-Lead, Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150-Inch Narrow 14-Lead, Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150-Inch Narrow 16-Terminal, Molded Leadless Package (MLP), JEDEC MO-220, 3mm Square 14-Lead, Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mmWide 14-Lead, Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Packing Method
Tube Tape and Reel Tape and Reel Tube Tape and Reel
All packages are lead free per JEDEC: J-STD-020B standard.
/OE SPEED VMO/FSE0
DD+
+ -
VPO
RCV
VP
VM
Figure 1. Logic Diagram
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2 www.fairchildsemi.com
USB1T11A -- Universal Serial Bus Transceiver
Pin Configuration
Speed D-
14
/OE
2
13
VMO/FSEO
12 VPO 13 14 15
D+
MODE
1
VCC
11
10
NC
9 8 7 6
NC
RCV
3
12
VPO
NC GND
VP VM SUSPND
4
11
D+
VMO/FSEO SUSPND
5
10
DVCC
16 1
Mode
5 2
/OE
VM
6
9
SPEED
3
RCV
4
VP
GND
7
8
NC
Figure 2. TSSOP and SOIC Pin Assignments
Figure 3. MLP Pin Assignments
Pin Descriptions
Pin Names
RVC /OE Mode
I/O
O I I
Description
Receive Data. CMOS level output for USB differential input. Output Enable. Active LOW, enables the transceiver to transmit data on the bus. When not active, the transceiver is in receive mode. Mode. When left unconnected, a weak pull-up transistor pulls it to VCC and, in this GND, the VMO/FSEO pin takes the function of FSEO (force SEO). Inputs to differential driver. (Outputs from SIE.)
Mode
0
VPO
0 0 1 1
VMO/FSEO
RESULT
Logic "0" /SEO Logic "1" /SEO
VPO,VMO/FSEO
I 1
0 0 1 1
0 1 0 1
/SEO Logic "0" Logic "1" Illegal Code
Gated version of D- and D+. Outputs are logic "0" and logic "1." Used to detect single ended zero (/SEO), error conditions, and interconnected speed. (Input to SIE).
VP
VP,VM O 0 0 1 0 D+, DSUSPND Speed VCC GND
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2
VM
0 1 0 1
RESULT
/SEO Low Speed Full Speed Error
AI/O I I
Data+, Data-. Differential data bus conforming to the Universal Serial Bus standard. Suspend. Enables a low-power state while the USB bus is inactive. While the suspend pin is active, it drives the RCV pin to a logic "0" state. Both D+ and D- are 3STATE. Edge Rate Control. Logic "1" operates at edge rates for "full speed." Logic "0" operates edge rates for "low speed." 3.0 to 3.6 power supply. Ground reference.
www.fairchildsemi.com 2
USB1T11A -- Universal Serial Bus Transceiver
Functional Truth Table
Input
Mode
0 0 0 0 1 1 1 1 Don't Care Don't Care
I/O
/OE
0 0 0 0 0 0 0 0 1 1
Outputs
D1 0 0 0 0 1 0 1
VPO
0 0 1 1 0 0 1 1 Don't Care Don't Care
VMO/FSEO
0 1 0 1 0 1 0 1 Don't Care Don't Care
SUSPND
0 0 0 0 0 0 0 0 0 1
D+
0 0 1 0 0 0 1 1 3-State 3-State
RCV
0 Undefined State 1 Undefined State Undefined State 0 1 Undefined State Undefined State Undefined State
VP
0 0 1 0 0 0 1 Undefined State Undefined State Undefined State
VM
1 0 0 0 0 1 0 Undefined State Undefined State Undefined State
Result
Logic "0" /SEO Logic "1" /SEO /SEO Logic "0" Logic "1" Illegal Code D+/DHi-Z D+/DHi-Z
3-State 3-State
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2
www.fairchildsemi.com 3
USB1T11A -- Universal Serial Bus Transceiver
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VCC IIK VIN VI/O IOK VO IO ICC / IGND TSTG DC Supply Voltage
Parameter
DC Input Diode Current, VIN<0V Input Voltage Input Voltage Output Diode Current, VO>VCC or VO<0 Output Voltage Output Source or Sink Current (VO = 0 to VCC) VCC / GND Current Storage Temperature Range VP, VM, RCV Pins D+/D- Pins
(1)
Min.
0.5 0.5 0.5 0.5
Max.
7.0 -50 5.5 VCC + 0.5 50 VCC + 0.5 15 50 100
Unit
V mA V V mA V mA mA C
-60
+150
Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC VIN VAI/O VO TA Input Voltage Input Range for AI/0 Output Voltage
Parameter
Power Supply Operating
Min.
3.0 0 0 0 -40
Max.
3.6 5.5 VCC VCC +85
Unit
V V V V C
Operating Ambient Temperature, Free Air
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2
www.fairchildsemi.com 4
USB1T11A -- Universal Serial Bus Transceiver
DC Electrical Characteristics Digital Pins
Over recommended range of supply voltage and operating free air temperature unless otherwise noted. VCC = 3.0V to 3.6V.
Symbol Input Levels
VIL VIH
Parameter
Conditions
TA=-40 to +85C Min. Typ. Max.
0.8 2
Units
Low-Level Input Voltage High-Level Input Voltage IOL=4mA IOL=20A IOH=4mA IOH=20A VCC=3.0 to 3.6 VCC=3.0 to 3.6 VCC=3.0 to 3.6 VCC=3.0 to 3.6, VIN=VCC or GND VCC=3.0 to 3.6 Mode=VCC 2.5 VCC-0.1
V V
Output Levels
VOL VOH Low-Level Output Voltage High-Level Output Voltage 0.4 0.1 V V
Leakage Current
IIN ICCFS ICCLS ICCQ ICCS Input Leakage Current Supply Current, Full Speed Supply Current, Low Speed Quiescent Supply Current Supply Current in Suspend 5 5 5 5 10 A mA mA mA A
DC Electrical Characteristics D+/D- Pins
Over recommended range of supply voltage and operating free air temperature unless otherwise noted. VCC = 3.0V to 3.6V.
Symbol Input Levels
VDI VCM VSE VOL VOH VCR
Parameter
Conditions
TA=-40 to +85C Min.
0.2 0.8 0.8 2.5 2.0 0.3
Typ.
Max.
Units
Differential Input Sensitivity Differential Common-Mode Range Single-Ended Receiver Threshold Static Output Low-Voltage Static Output High-Voltage Differential Crossover High Z-State Data Line Leakage Current Transceiver Capacitance Capacitance Match Driver Output Resistance Resistance Match
(D+) - (D-) Includes VDI Range
V V V V V V
Output Levels
RL of 1.5k to 3.6V RL of 1.5k to GND 2.8 1.3 3.6 2.0
Leakage Current
IOZ 0VCapacitance
CIN
(2)
Pin to GND
10 10
pF % %
Output Resistance
ZDRV
(3)
Steady-State Drive
4
20 10
Notes: 2. This specification is guaranteed by design and statistical process distribution. 3. Excludes external resistor. To comply with USB specification 1.1, external series resistors of 24W 1% each on D+ and D- are recommended.
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2 www.fairchildsemi.com 5
USB1T11A -- Universal Serial Bus Transceiver
AC Electrical Characteristics D+/D- Pins, Full Speed
Over recommended range of supply voltage and operating free air temperature unless otherwise noted. VCC = 3.0V to 3.6V, CL = 50Pf; RL = k on D+ to VCC.
Symbol Driver Characteristics
tR, tF tRFM VCRS
Parameter
Conditions
TA=-40 to +85C Min.
4 90 1.3
Typ.
Max.
20 110 2.0
Units
Rise and Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage Driver Propagation Delay (VPO,VMO/FSEO to D+D-) Driver Disable Delay (/OE to D+/D-) Driver Enable Delay (/OE to D+/D-)
10 and 90%, Figure 4 t r / tf
ns % V
Driver Timings
tPLH tPHZ, tPLZ tPZH, tPZL Figure 5 Figure 7 Figure 7 18 13 17 ns ns ns
Receiver Timings
tPLH tPHL tPLH, tPHL Receiver Propagation Delay D+/D- to RVC Single-ended Receiver Delay (D+,D- to VP, VM) Figure 6 Figure 6 Figure 6 16 19 8 ns ns ns
AC Electrical Characteristics D+/D- Pins, Low Speed
Over recommended range of supply voltage and operating free air temperature unless otherwise noted. VCC = 3.0V to 3.6V, CL = 200pF to 600pF; RL = 1.5k on D- to VCC.
Symbol Driver Characteristics
tLR, tLF tRFM VCRS
Parameter
Conditions
TA=-40 to +85C Min.
75 80 1.3
Typ.
Max.
300 120 2.0
Units
Rise and Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage Driver Propagation Delay (VPO,VMO/FSEO to D+D-) Driver Disable Delay (/OE to D+/D-) Driver Enable Delay (/OE to D+/D-)
10 and 90%, Figure 4 t r / tf
ns % V
Driver Timings
tPLH, tPHL tPHZ, tPLZ tPZH, tPZL Figure 5 Figure 7 Figure 7 300 13 205 ns ns ns
Receiver Timings
tPLH, tPHL tPLH, tPHL Receiver Propagation Delay (D+/D- to RVC) Single-ended Receiver Delay (D+,D- to VP, VM) Figure 6 Figure 6 18 28 ns ns
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2
www.fairchildsemi.com 6
USB1T11A -- Universal Serial Bus Transceiver
AC Loadings and Waveforms
VOL and VOH are the typical output voltage drops that occur with the output load. VCC never goes below 3.0V.
Figure 4. Rise and Fall Times
Figure 5. VPO, VMO/FSEO to D+/D-
Figure 6. D+/D- to RCV, VP/VM
Figure 7. /OE to D+/D-
Test Circuits and Waveforms
Figure 8. Load for VM/VP and RCV
Figure 9. Load for Enable and Disable Times
Test D-/LS D+/LS CL=50pF, Full Speed CL=200pF, Full Speed (Minimum Timing) CL=600pF, Full Speed (Maximum Timing) 1.5k on D-(Low Speed) or D+ (Full Speed) only. D-/FS D+/FS
S1 Close Open Open Close
Figure 10. Load for D+/D-
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2
www.fairchildsemi.com 7
USB1T11A -- Universal Serial Bus Transceiver
Physical Dimensions
8.75 8.50 7.62
14 8 B
A
0.65
5.60 6.00 4.00 3.80
PIN ONE INDICATOR
1
7
1.70
1.27
1.27 (0.33)
0.51 0.35
0.25
M
LAND PATTERN RECOMMENDATION
CBA
1.75 MAX 1.50 1.25 0.25 0.10
C 0.10 C
SEE DETAIL A
0.25 0.19
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD GAGE PLANE FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X145-14M 0.36 E) DRAWING CONFORMS TO ASME Y14.5M-1994 F) DRAWING FILE NAME: M14AREV13
0.50 X 45 0.25 R0.10 R0.10
8 0
0.90 0.50 (1.04)
DETAIL A
SCALE: 20:1
SEATING PLANE
Figure 11. 14-Lead, Small Outline Integrated Circuit (SOIC) MO-012, 0.150-inch Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2
www.fairchildsemi.com 8
USB1T11A -- Universal Serial Bus Transceiver
Physical Dimensions
Figure 12. 16-Terminal, Molded Leadless Package (MLP), JEDEC MO-220, 3mm Square
Click here for tape and reel specifications, available at: http://www.fairchildsemi.com/products/analog/pdf/MLP6_3x3_TNR.pdf Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2 www.fairchildsemi.com 9
USB1T11A -- Universal Serial Bus Transceiver
Physical Dimensions
0.43 TYP
0.65
1.65
0.45
6.10
12.00TOP R0.09 min
& BOTTOM
A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 1982 E. LANDPATTERN STANDARD: SOP65P640X110-14M F. DRAWING FILE NAME: MTC14REV6
1.00
R0.09min
Figure 13. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2
www.fairchildsemi.com 10
USB1T11A -- Universal Serial Bus Transceiver
(c) 1999 Fairchild Semiconductor Corporation USB1T11A * Rev. 1.0.2
www.fairchildsemi.com 11


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